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Battery Research at Montana Tech

by Dr. John Morrison

 

Montana Tech has been involved in research activities in support of electrical energy storage technologies since 2001. Starting in 2001, Montana Tech hired some new technical staff in order to enhance electrical engineering courses in the General Engineering Department. A new member of the Montana Tech technical staff had retired from the Idaho National Laboratory (INL) where he had been working in the Energy Storage Technology Lab (ESTL). Montana Tech encourages their staff to develop collaborative relationships with industrial research entities. Thus contacts with the INL ESTL were maintained and nurtured.

 

Several research concepts were developed in the collaboration between the INL ESTL and Montana Tech and many of them have led to funded research tasks for Montana Tech students. One of the first was the concept of a High Accuracy Differential Measurement. A Montana Tech grad student, Ray Rice was funded to do a breadboard design to demonstrate the concept. The bread board of the concept was designed, built and successfully demonstrated at INL.

The next research concept that INL funded at Montana Tech was a concept for the predictive feature for the Battery Status Monitor (BSM). The BSM is an area of research that the ESTL was and still is actively perusing. INL supported a Montana Tech student for the summer of 2002 to start the research and then supported 3 Montana Tech students, Ron Fenton, Juston Hohn and Peter Willson, during the school year of 2002-2003. This became their senior project. The effort led to the development and successful proof of concept of the predictive portion of the INL BSM. The effort of the students was based upon an open literature battery model. INL will use the same concept with their proprietary battery models in the actual BSM.

 

One concept that arose from the collaboration between INL and Montana Tech was the investigation of methods to measure in-situ and real time the impedance spectrum of a battery. The INL ESTL has done a lot of testing of batteries and their results have shown that the shift of the battery impedance spectrum over life of a battery is very strongly correlated to the general health of the battery. In 2004 INL funded a Montana Tech grad student, Wes Albrecht, to develop a technique to use random noise to identify the impedance spectrum of a battery, Impedance Noise Identification (INI). This concept was developed, successfully demonstrated and became the MS thesis for that student. During that same time, Montana Tech researchers, inspired by the noise approach, conceived a new approach, Compensated Synchronous Detection (CSD), which held out the promise to significantly reduce the time required to perform the measurement needed for the impedance spectrum. The intellectual property of this new concept belongs to Montana Tech as the researchers were not funded by INL.

 

During the spring of 05, Montana Tech in collaboration with a small business, Qualtech, submitted a joint proposal to NASA for a STTR grant to develop in-situ methods to estimate a battery health. Qualtech and Montana Tech won the Phase I grant to develop a proof of concept. During the Phase I grant, the CSD algorithm was analytically validated. Additionally, it was upgraded with a neural network that significantly enhances the compensation effect to much further reduce spectrum cross-talk error. Montana Tech and Qualtech have a patent pending for this concept. Also during Phase I, two Montana Tech students, Rich Hoffmann and Jim Slade, were employed to hardware validate the concept. To do this, the students adapted the INL INI hardware platform with an improved anti-aliasing filter. During the NASA Phase I development INL expressed great interest and provided at no cost battery test data and hosted visits by the Montana Tech CSD design team. During these visits the CSD hardware platform was tested against INL commercial hardware that measures a battery impedance spectrum in non-real time. The INL support for this Phase I proved invaluable. Their INI system was twice as slow as the first generation CSD system but the INI system did generate a high resolution impedance spectrum while CSD did not. Phase I ended with the result that the concept of CSD was feasible and held promise of being significantly faster. For example, Phase I CSD hardware required an acquisition time of 40 periods of the lowest frequency. Analytically, it was shown that 5 periods are feasible. The Phase I effort ended in January 2006.

 

With letters of support from INL Montana Tech and Qualtech, the CSD development team, applied for a Phase II continuation. After some delay a Phase II was granted and started in the fall of 2006. Two Montana Tech students, one grad and one undergrad, Brian Smyth and Josh Wold, were funded to continue the CSD effort. A much improved CSD hardware system was developed and the barrier that required 40 periods of the lowest frequency was broken. When the system was demonstrated at INL the 40 periods had been reduced to 3 periods. Additionally, the comparison with the commercial system was very close.

 

INL was impressed to the extent that they funded another Montana Tech student, Ian Donnellan, to reactivate their INI system with the CSD hardware upgrades that can run both INI and CSD. They also initiated discussions on incorporating CSD into their BSM concept. In the summer of 2007 Montana Tech and Qualtech delivered a prototype CSD system to NASA. They went to NASA in San Jose, demonstrated the system and turned it over to NASA.

 

 

 

 

 

 

 

 

 

 

 

In the meantime INL and Qualtech have joined in responding to a Navy SBIR proposal. It is a really tiny effort, but they did win it. INL is using a portion of their Navy funds to continue funding the Montana Tech student, Ian, in the upgrade of their INI system to become CSD. Additionally, they and Qualtech plan to pitch CSD for the Navy Phase II. The Montana Tech student will attend the Phase I project final presentation and demonstrate the CSD system to the Navy.

 

 

 

 

 

 

 

 

 

 

 

 

As for NASA Phase II, that effort ended in the summer of 2008. Many lessons were learned and improvements have been integrated into the CSD concept. In July 2008 the patent on the CSD concept was granted and a brand new measurement concept was developed. It came about from a collaborative “brainstorming” effort between researchers at INL, Qualtech and Montana Tech. This new concept, Fast Summation Transformation (FST) has a patent pending. It has been both analytically validated with computer simulations and physically validated by implementation on the hardware system with tests on actual batteries. The FST concept is a quantum jump beyond CSD. The system running FST is truly real time with response time now at 1 period of the lowest frequency of the impedance spectrum. The Montana Tech grad student, Brian Smyth, has made this new hardware system development his MS thesis. Additionally, one of the NASA researchers was a member of Brian’s committee and his thesis defense was a significant part of the project final presentation at NASA in San Jose. The CSD system, including FST, was delivered with complete documentation and demonstrated to NASA. They are now in the process of integrating it into their battery test program. Other than some software support effort for Qualtech, it doesn’t appear that NASA has any other interest at this time for this technology. Never the less, INL, Qualtech, and Montana Tech plan to push this technology to become an integral part of the BSM concept and that concept will very likely be enabling to electric vehicles of the future. Now that the technology for a real time insitu battery impedance measurement has been developed the challenge is to implement it in actual multi-cell high power battery modules. The research team is presently developing new concepts that will realize those applications.